Sidense (Kanata, Ontario, Canada) did not disclose on its website the underlying fusing technology but claims no additional programming voltages are required and that no charge storage is required for data retention in excess of ten years duration. The company said its design does not require any additional masks or process steps, and utilizes only one transistor as a memory cell positioning it as a leader in area efficient NVM IP core solutions. Although the memory element is one-time-programmable fuse it is possible to emulate multi-programmability through movable addressing. The IP is offered as a series of hard macros supporting different configurations and targeted towards different foundries? processes with supporting documentation, test benches and design files, the company said. Sidense calls its technology ?1T-Fuse? and said the structure has been proven in silicon at 130-nm and can be ported to 90-nm, 65-nm and below. "
Monday, November 21, 2005
EETimes.com - Canadian startup launches fuse-memory
"Sidense Corp., a startup formed by Polish engineers, has said it has developed a fuse-based one-time programmable non-volatile memory (NVM) intellectual property (IP) core targeted at a standard logic CMOS manufacturing process.
Sidense (Kanata, Ontario, Canada) did not disclose on its website the underlying fusing technology but claims no additional programming voltages are required and that no charge storage is required for data retention in excess of ten years duration. The company said its design does not require any additional masks or process steps, and utilizes only one transistor as a memory cell positioning it as a leader in area efficient NVM IP core solutions. Although the memory element is one-time-programmable fuse it is possible to emulate multi-programmability through movable addressing. The IP is offered as a series of hard macros supporting different configurations and targeted towards different foundries? processes with supporting documentation, test benches and design files, the company said. Sidense calls its technology ?1T-Fuse? and said the structure has been proven in silicon at 130-nm and can be ported to 90-nm, 65-nm and below. "
Sidense (Kanata, Ontario, Canada) did not disclose on its website the underlying fusing technology but claims no additional programming voltages are required and that no charge storage is required for data retention in excess of ten years duration. The company said its design does not require any additional masks or process steps, and utilizes only one transistor as a memory cell positioning it as a leader in area efficient NVM IP core solutions. Although the memory element is one-time-programmable fuse it is possible to emulate multi-programmability through movable addressing. The IP is offered as a series of hard macros supporting different configurations and targeted towards different foundries? processes with supporting documentation, test benches and design files, the company said. Sidense calls its technology ?1T-Fuse? and said the structure has been proven in silicon at 130-nm and can be ported to 90-nm, 65-nm and below. "
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